1. Field of the Invention
The present invention relates to a mask, a method of producing it, a method of producing a semiconductor device with using it, and a semiconductor producing apparatus, and more particularly to reduction of distortion due to a temperature rise during process steps.
2. Description of the Related Art
Recently, fine patterning and high integration of a semiconductor device are being advanced, and it is requested to develop a technique of accurately performing a subquarter micron process with good reproducibility.
In the production of a semiconductor integrated circuit (LSI), for example, several to ten ion implanting steps must be conducted in LSI forming steps such as formations of wells, channels, sour/drain regions, and contact regions. Usually, ions are implanted into an opening region of a resist pattern in the following manner. First, a resist is applied to the surface of a substrate, and a selective exposure step and a developing step are then conducted. Thereafter, a resist pattern is formed by the photolithography, and ion implantation is performed through the resist pattern.
FIGS. 18A to 18E show an example of an ion implanting step. As shown in FIG. 18A, a device isolation insulating film 12 is formed in the surface of a silicon substrate 11 by the LOCOS method to isolate device regions from one another, and a resist R is applied to the whole surface of the substrate.
As shown in FIG. 18B, an exposure process is then performed through a photomask to form an exposed region, and, as shown in FIG. 18C, the resist in the exposed region is removed away by development, thereby forming a resist pattern R.
As shown in FIG. 18D, ion implantation is performed through the resist pattern R to form an ion implanted region 13.
Finally, the resist pattern R is removed away, and a thermal diffusion process is performed, whereby the ion implanted region 13 (diffused region) of a desired depth is formed as shown in FIG. 18E.
As described above, resist application, patterning by exposure and development, and film separation after ion implantation are usually necessary, and many steps are required. Moreover, a wet step must be conducted, and hence there is a serious problem in that the surface of the substrate is contaminated.
In the case where a pattern is formed by a process including such a lithography step, the exposure step is performed through a pattern which is once printed onto an exposure mask, thereby causing another problem of a reduced accuracy due to transfer.
It has been proposed to use a stencil mask in a charged particle beam or electron beam exposure apparatus which is known as one of semiconductor production techniques.
The direct lithography technique in which an electron beam or the like is scanned to directly write fine patterns onto a wafer (semiconductor substrate) requires a very long process time. In order to shorten the process time, therefore, an operation of scanning an electron beam along a pattern is not conducted, and a mask (stencil mask) having an opening pattern is used so that an electron beam or the like selectively impinges on a wafer (semiconductor substrate).
This mask technique may be applied to the ion implantation technique. In this case, when a stencil mask is used in place of a resist mask in a process of ion implantation, an ion beam can be selectively introduced into a wafer (substrate). Therefore, the patterning steps of resist application, exposure, and development, and other steps such as resist separation after ion implantation can be omitted. Furthermore, since a wet step is not conducted, the surface of a wafer is not contaminated, and the pattern formation process in a short time is enabled.
In this case, however, ions directly impinge on the mask, and hence the temperature of the mask is largely raised, so that members constituting the mask are greatly expanded to be warped or deformed, thereby causing a problem in that the pattern accuracy is lowered.
In (a) and (b) of FIG. 20, displacements of a stencil mask M at ordinary and high temperatures are schematically shown. It will be seen that, at a high temperature, the displacement d (flexure of the mask) is large, and the opening position and opening accuracy of a pattern are very largely deviated.
FIGS. 21 and 22 show respectively measurement results of the temperature rise of a stencil mask and displacement (flexure) of a membrane area in the case where ions were implanted into the surface of a wafer (semiconductor substrate) through the stencil mask M in which, as shown in FIG. 19, a thermocouple K was placed in the middle of the membrane area of an area of 30 mm2 and a thickness of 10 .m.
In the ion implantation, boron ions were implanted under the conditions that the energy was 90 keV and the dose amount was 2E13 ions/cm2, while changing the beam power.
As apparent from FIGS. 21 and 22, the ion beam implantation causes the temperature of the stencil mask to be largely raised, and displacement to occur.
As described above, the conventional art has a problem in that accurate pattern formation cannot be performed with using a stencil mask.
This problem is caused not only in techniques relating to ions, such as ion implantation and ion beam etching, and also in a charged particle beam or electron beam exposure step, an etching step, and a film growing step. As fine patterning is further advanced, even a slight temperature change causes a larger problem.